1. Field of the Invention
The present invention relates to digital-to-analog converters and in particular to digital-to-analog converters that perform self-calibration.
2. Description of the Related Art
A digital-to-analog converter (DAC) is used to convert a digital control word into an analog signal. There are numerous forms of DACs. While the principle disclosed in the present invention is applicable to any form of DACs, a current-steering DAC is used as an example throughout this disclosure.
FIG. 1 depicts a typical 4-bit current-steering DAC 100 that converts a 4-bit control code D[3:0] into an analog current signal IOUT. The DAC 100 comprises four current cells I0, I1 I2, and I3, controlled by digital bits D[0], D[1], D[2], and D[3], respectively. Each of the four current cells is tied to a first fixed potential node VSRC on one end and tied to a second potential node VOUT on the other end. Each current cell is turned on when its corresponding controlling bit is asserted, and turned off otherwise.
The current cell I0 is referred to as a least significant bit (LSB) cell that is configured to generate a current output of ILSB, while the current cell I3 is referred to as a most significant bit (MSB) cell. In an ideal situation, the current cells I0, I1, I2, and I3 generate current outputs of 20·ILSB, 21·ILSB, 22·ILSB, and 23·ILSB, respectively, when their controlling bits D[0], D[1], D[2], and D[3] are asserted, respectively. A total output current of the DAC 100 (or the analog current signal IOUT) has the following relationship:IOUT=D[0]·20·ILSB+D[1]·21·ILSB+D[2]·22·ILSB+D[3]·23·ILSB; orIOUT=(D[0]·20+D[1]·21+D[2]·22+D[3]·23)·ILSB.
Thus, the analog current signal IOUT is linearly proportional to the number represented by the control code D[3:0]. In practice, a manufacturing process cannot guarantee a perfectly accurate output level for each of the current cells. This effectively introduces an error to the total output current of the DAC 100. A particular specification of interest regarding a DAC's accuracy is differential non-linearity (DNL). Ideally, the DAC's total output current will have an incremental change of ILSB in response to an incremental change in the number represented by the control code D[3:0]. DNL is defined as a difference between an actual incremental change and the ideal incremental change for the total output current. The worse case DNL usually occurs when the control code D[3:0] makes an incremental change from code 7 (D[3:0]=0111 with all current cells turned on except for the MSB cell) to code 8 (D[3:0]=1000 with all current cells turned off except for the MSB cell). What is needed is a method to improve the DNL by calibrating the DAC to reduce the error associated with inaccuracies in the current cells.